G фатальная ошибка не заданы входные файлы компиляция прервана

What I’ve already done:

I’ve looked through other StackOverflow threads with similar issues, but none of them seem to apply to my specific case. I’ve also double checked to makes sure that the correct files are in the correct locations (folders) and that everything is named properly as well.

This is the error I’m receiving:

[employee_xyz@petco.com]$ make
g++ -Wall -O2 -ansi -pedantic -o dog.cpp
g++: fatal error: no input files
compilation terminated.
make: *** [mscp.o] Error 4

Here’s the makefile in question:

CC = g++
CFLAGS = -Wall -O2 -ansi -pedantic -Werror

TARGETS = dog dog.o collar.o

dog: dog.o collar.o
    $(CC) $(CFLAGS) -o dog collar.o dog.o

dog.o: dog.cpp collar.h
    $(CC) $(CFLAGS) -o dog.cpp

collar.o: collar.cpp collar.h
    $(CC) $(CFLAGS) -o collar.cpp

clean:
    -rm -f ${TARGETS}

Here are the files (they’re all in the same directory) that are being referenced by the makefile:

-collar.cpp
-collar.h
-makefile
-dog.cpp

What am I doing wrong?

What I’ve already done:

I’ve looked through other StackOverflow threads with similar issues, but none of them seem to apply to my specific case. I’ve also double checked to makes sure that the correct files are in the correct locations (folders) and that everything is named properly as well.

This is the error I’m receiving:

[employee_xyz@petco.com]$ make
g++ -Wall -O2 -ansi -pedantic -o dog.cpp
g++: fatal error: no input files
compilation terminated.
make: *** [mscp.o] Error 4

Here’s the makefile in question:

CC = g++
CFLAGS = -Wall -O2 -ansi -pedantic -Werror

TARGETS = dog dog.o collar.o

dog: dog.o collar.o
    $(CC) $(CFLAGS) -o dog collar.o dog.o

dog.o: dog.cpp collar.h
    $(CC) $(CFLAGS) -o dog.cpp

collar.o: collar.cpp collar.h
    $(CC) $(CFLAGS) -o collar.cpp

clean:
    -rm -f ${TARGETS}

Here are the files (they’re all in the same directory) that are being referenced by the makefile:

-collar.cpp
-collar.h
-makefile
-dog.cpp

What am I doing wrong?

I’m having some trouble with my first bigger makefile project.
I got a bigger Library i’m using in my c++ project. More accurate: In my .cpp files and .h files I need to include some headers out of this bigger library.

Here’s my structure, to let you know how I’m using the library in my project:

myproj
  |
  |____Makefile
  |____main.cpp
  |____init.cpp
  |____end.cpp
  |____init.h
  |____end.h
  |____Dependencies
           |____biggerlib
                   |____bin   
                           |____...
                   |____include
                           |____#more directories including
                                #the Library headers
                           |____...
                   |____src
                           |____biggerLib1
                           |____biggerLib2
                                   |____biggerLibrary.cpp
                                          |____...
                                   |____Lib2.cpp
                                          |____...
                                   |____Lib3.cpp
                                          |____...
                                   |____Util
                                          |____DebugOut.cpp
                                   |____Dev
                                   |____Data
                                          |____etc.
                   |____makestuff
                           |____...
                           |____...
                                   |____...
                           |____...
                   |____codestuff
                           |____...
                           |____...
                                   |____...
                           |____...
                   |____etc.

I’m not allowed to change that structure.

So, my problem is, that if I start make, gcc or g++ does not find my input files.
Error code:

g++: fatal error: no input files
compilation terminated.
*makefileName*:21: recipe for target '*Name*' failed
make: *** [*Name*] Error 1

Therefore, here some out of my makefile:
At first my OBJECTS file:

OBJECTS += 
$(BUILD)main.o 
$(BUILD)init.o 
$(BUILD)end.o 

Then my makefile:

#Name (output name / project name)
NAME = proj

#Compiler directory
CC = gcc
CPP = g++
#Libray directorys
SDCC = /home/myname/myproj/Dependencies/biggerlib/src/biggerLib2/Util

# the headers are working well since yesterday but now i got the trouble with the input stuff...

#C-Flags for object-compiling
CFLAGS = -O2 -g3 -c -I$(SDCHDR) -I$(SDCDATAMODEL) -I$(SDCPOCO) #may i have to add here the source files too? did not work...

#Main-target (linking)
$(NAME) : $(OBJECTS)
    $(CPP) -o $(NAME) -I$(SDCC)/DebugOut.cpp ## this one was just to try if I could bind in one single .h file... 

#Object-targets
%.o : %.cpp 
    $(CPP) -o $@ $< $(CFLAGS)

My make command:

make -f makefilename

So it would be nice, if anyone of you know how I could include my missing input files, without changing the directory structure.

I’m having some trouble with my first bigger makefile project.
I got a bigger Library i’m using in my c++ project. More accurate: In my .cpp files and .h files I need to include some headers out of this bigger library.

Here’s my structure, to let you know how I’m using the library in my project:

myproj
  |
  |____Makefile
  |____main.cpp
  |____init.cpp
  |____end.cpp
  |____init.h
  |____end.h
  |____Dependencies
           |____biggerlib
                   |____bin   
                           |____...
                   |____include
                           |____#more directories including
                                #the Library headers
                           |____...
                   |____src
                           |____biggerLib1
                           |____biggerLib2
                                   |____biggerLibrary.cpp
                                          |____...
                                   |____Lib2.cpp
                                          |____...
                                   |____Lib3.cpp
                                          |____...
                                   |____Util
                                          |____DebugOut.cpp
                                   |____Dev
                                   |____Data
                                          |____etc.
                   |____makestuff
                           |____...
                           |____...
                                   |____...
                           |____...
                   |____codestuff
                           |____...
                           |____...
                                   |____...
                           |____...
                   |____etc.

I’m not allowed to change that structure.

So, my problem is, that if I start make, gcc or g++ does not find my input files.
Error code:

g++: fatal error: no input files
compilation terminated.
*makefileName*:21: recipe for target '*Name*' failed
make: *** [*Name*] Error 1

Therefore, here some out of my makefile:
At first my OBJECTS file:

OBJECTS += 
$(BUILD)main.o 
$(BUILD)init.o 
$(BUILD)end.o 

Then my makefile:

#Name (output name / project name)
NAME = proj

#Compiler directory
CC = gcc
CPP = g++
#Libray directorys
SDCC = /home/myname/myproj/Dependencies/biggerlib/src/biggerLib2/Util

# the headers are working well since yesterday but now i got the trouble with the input stuff...

#C-Flags for object-compiling
CFLAGS = -O2 -g3 -c -I$(SDCHDR) -I$(SDCDATAMODEL) -I$(SDCPOCO) #may i have to add here the source files too? did not work...

#Main-target (linking)
$(NAME) : $(OBJECTS)
    $(CPP) -o $(NAME) -I$(SDCC)/DebugOut.cpp ## this one was just to try if I could bind in one single .h file... 

#Object-targets
%.o : %.cpp 
    $(CPP) -o $@ $< $(CFLAGS)

My make command:

make -f makefilename

So it would be nice, if anyone of you know how I could include my missing input files, without changing the directory structure.